Dec 2022 - Present
Digital Signal Processing Engineer
Altera (Intel) - San Jose, California
- -Military and aerospace system solution engineering.
- -Led the end-to-end design lifecycle, from initial concept through to final release, successfully delivering multiple FPGA designs for military and aerospace applications, resulting in enhanced customer satisfaction and increased adoption of our solutions.
- -Utilized Verilog, MATLAB, DSP Builder, and Python to develop and optimize FPGA designs.
- -Implemented and optimized signal processing algorithms using cutting-edge ADC/DACs, enhancing the performance and accuracy of FPGA-based radar and electronic warfare systems.
June 2021 - Dec 2022
Application Engineer
Intel - San Jose, California
- -Completed three six-month rotations with various engineering teams throughout Intel PSG working with current and future products.
- -Created a hybrid floating point FFT DSP benchmark to measure FPGA DSP performance.
- -Worked on a technical path finding project to enable FPGAs in cloud native environments.
- -Experience writing FPGA SoC firmware including crypto routines and configuration state machines.
- -Experience interviewing candidates with various experience levels in hiring panels.
June 2020 - May 2021
Technical Intern, Embedded Applications Engineering
Intel - San Jose, California
- -Automated building and testing of Linux and the GSRD for various Intel SoC FPGAs, a process which used to take days to complete manually can now be completed within a couple hours.
- -Mapped and documented the customer journey for Intel FPGA products, enhancing user experience and support.
- -Debugging boot issues of embedded Linux and UBoot on SoC FPGAs.
Aug 2018 - Jan 2019
Software Intern
DemandLink - Salem, OR
- -Extensive work with Vertica and Microsoft SQL Server.
- -Experience analyzing large legacy codebase to determine external dependencies.
- -Experience analyzing hardware requirements for a large scale, distributed, compute heavy application.